I have discovered a little problem with the K8055 board that I modified to the PIC18F chips.
These 18F chips have 10 bit AD converters. Which is quite nice and of course would it be even nicer to use them at that precision. However, the original K8055 uses the USB rails directly as Vdd/Vss for the PIC. I’m using a pretty high quality notebook (Lenovo T420) and still, the input voltage seems unstable enough to be useless as reference voltage for 9, let alone 10 bits precision. I assume that the supply voltage is the source of the AD instability. Correct me if I’m wrong or missing something.
I see in the schematics that the new K8055N board uses its own on-board 3.3V regulator circuitry to create a stable Vdd from the +5V USB supply. That is certainly the proper way to solve the problem and I assume, the K8055N doesn’t suffer from all this. Short of bolting on a similar construct (which is ugly and probably beyond the abilities of most readers), what could be done to stabilize the reference voltage?
how low goes +5V on USB under load (on your T420)?
did you mean the RA2 and RA3 pins only?
(VREFH – VREFL)>=3.0V
we can use low dropout, 3.3V (i think 4.096V too) voltage reference (precision VREF - expensive :/), for example LM4120, REF3133
will the (VREFH – VREFL) not affect 18F AD input range?
for stabilisation +5V of the complete stuff, i think, the TPS63002DRC, LTC3530 or something from buck-boost converters can be used
RA2/RA3 on the K8055 are used for the board selector jumpers. We currently use RA3 to enter the boot loader.
Currently we are using Vdd as reference, and that is whatever comes from the USB.
The K8055N has a LM317 and uses the 3.3V output as Vdd. It uses RA2 for the board selection and RA3 seems unused - just a capacitor to ground. However, except for the quad OP-AMP TLV274, the board also uses the 3.3V for pretty much everything else. Converting that would probably a lot of cut PCB paths and new wire bridges. So stabilizing the 5V input with an optional external power supply seems like the easier way.
I’m just not 100% sure yet that the Vdd stability is the source of the problem. I have a little 4-port travel USB hub, that I don’t use at all. I may modify that so that it uses an external supplied 5V for USB power and see if that changes anything.
The datasheet for the TLV274 ti.com/lit/ds/slos351d/slos351d.pdf on page 12 says when driving a capacitive load, there should be a series resistor of at least 20 Ohms to avoid ringing or oscillations.
I don’t see real oscillations, but my scope shows definitely some noise.
UPDATE: A 100 Ohm resistor in there doesn’t make any difference. That would have been too easy.
[quote=“k750”]how to test?
i can try this weekend to use +5V from stabilized power supply HY-3005 (+5V will be separated from usb).[/quote]
That would be great. I have rigged a small self powered USB hub using an old cell phone charger. Although the O-scope shows a lot less noise on Vdd, the ADC jitter is still there. I should try with a battery. If that doesn’t solve the problem, then it isn’t the input voltage.
both channels shows the same?
test conditions?[/quote]
Yes, both channels show the same.
ADC channels controlled with ATT1/ATT2.
To see this the data must be read with 10 bit precision. The K8055D compatibility layer scales it down to 8 bits, which masks the problem. So the test program needs to use the K8055M API described here: jannicash.info/k8055/tmp/Documen … 8055m.html
You could use the K8055control.exe command line utility to see it. It will flood stdout, but you can stop it with CTRL-C or typing “quit” blindly.
I tried with a battery as well as with a LM317 set to 5.1V and the noise on the analog input pins remains. I even tried feeding the OP-AMP it’s own stabilized voltage, like the K8055N does it. Still the same result.
I will try to solve this in software. Thanks for all your help. It is very much appreciated.
The whole thing may have been a timing issue. After a lot of fiddling around with oversampling and averaging, I tried to “poll” the analog ports inside the main loop, using a busy loop. Now there are positions on the ATT pots, that are more or less stable. Considering that AD conversion is temperature sensitive and looking at the noise on the VDD, a 10 bit value going +/- 1 every couple of seconds is “stable” for me.
if you disconnect pic, the noise (using battery) must stay at very low level. On other hand, the pic has input resistance/capacitance, and switching for charge Chold does variable load on output of an tlv274.
some noise will remain (frequency=pic sampling frequency), because of sampling from pic side. The output impedance of tlv274 isn’t 0 Om
what if change ACQT2:ACQT0 to more than is set now (bin 101)?
its possible, that capacitor Chold (on PIC) isn’t fully charged before conversion
K8055 schematic use no filtering at all (see ti.com/lit/ds/symlink/tlv274.pdf, s.13). Simple low pass filter can cut needless frequencies
if varying 1 bit (for example 255-256 bits), is Ok, but if 2 bit or more (255-256-255-254) - its not good
of course, the reason can be the noises at pic analog inputs too. using scope, their amplitude can be measured and after that we can calculate corresponding “amplitude in bits”
i think so:
say 1 bit=5V/1023=4,89mV; noise graph shows voltage min 0V, max 3mV - then we must get 0 or 1 value at pic side. if voltages are 0 and 8mV (amplitude 8mV), then 0,1 and 2 values are ok.
