Infinite Loop after calling ether.begin

I am running windows 8.1, Arduino Mega 2560 R3 code version 1.0.5, and everything complies and loads to the Arduino. After the execution of .begin in setup() the code stalls. I built the board and checked every connection many times and it seems to be functioning as expected other than the serial output and it doesn’t get a lease from the DHCP server. The network leds blink and seem normal. The code below is an example that I tried to test proper function of the shield. Any tips on what may be going wrong will be greatly appreciated.

#include <EtherCard.h>

// ethernet mac address - must be unique on your network
static byte mymac[] = { 0x74,0x69,0x69,0x2D,0x30,0x31 };

byte Ethernet::buffer[500]; // tcp/ip send and receive buffer

char page[] PROGMEM =
"HTTP/1.0 503 Service Unavailable\r\n"
"Content-Type: text/html\r\n"
"Retry-After: 600\r\n"
"\r\n"
"<html>"
  "<head><title>"
    "Service Temporarily Unavailable"
  "</title></head>"
  "<body>"
    "<h3>This service is currently unavailable</h3>"
    "<p><em>"
      "The main server is currently off-line.<br />"
      "Please try again later."
    "</em></p>"
  "</body>"
"</html>"
;

void setup(){
  Serial.begin(57600);
  Serial.println("\n[Serial is on]");
  ether.begin(sizeof Ethernet::buffer, mymac);
  Serial.println("\n[Returned from begin]");   //it never makes it to here (that I can tell)
  ether.dhcpSetup();
  Serial.println("\n[DHCP Returned]");
}

void loop(){
  // DHCP expiration is a bit brutal, because all other ethernet activity and
  // incoming packets will be ignored until a new lease has been acquired
  if (ether.dhcpExpired())
    ether.dhcpSetup();
    
  // wait for an incoming TCP packet, but ignore its contents
  if (ether.packetLoop(ether.packetReceive())) {
    memcpy_P(ether.tcpOffset(), page, sizeof page);
    ether.httpServerReply(sizeof page - 1);
  }
}

I see this in the lib and I am not sure if its correct.
The SS was set to pin 2 so I changed it to pin 53.
I am kind of new to the whole UNO vs mega war and I guess I will toss this card on the heap until I learn more.

//Arduino Duemilanove and other ATmega168 / 328-based boards,
//the SPI bus uses pins 10 (SS), 11 (MOSI), 12 (MISO), and 13 (SCK).
//On the Arduino Mega,
//this is 50 (MISO), 51 (MOSI), 52 (SCK), and 53 (SS).
//Note that even if you’re not using the SS pin, it must remain set as an output;
//otherwise, the SPI interface can be put into slave mode, rendering the library inoperative.

// If this is a Mega then use alternative SPI pins
// In setup() function in your sketch also use the following:
// /* Disable SD card */
// pinMode(4, OUTPUT);
// digitalWrite(4, HIGH);
//
// If you use a pin other than 53 then you still need to define
// pin 53 as output, in similar manner to ATMega328 versions:
// pinMode(53, OUTPUT);
// digitalWrite(53, HIGH);
//
#if defined(AVR_ATmega1280) || defined(AVR_ATmega2560)

#define SPI_MISO 50
#define SPI_MOSI 51
#define SPI_SCK 52
[color=#FF0000]#define SPI_SS 53 //2[/color]

Just as an update.

I can use an [color=#008000]arduino uno [/color]and it works great its just getting it to work with an [color=#FF0000]arduino mega [/color]that is impossible for me.

Sorry, we do not have any experience with an Arduino Mega at this time.

I have the same problem with my arduino Mega 2560. Code gets stuck at the ether.begin

Velleman, please give me support in order to get the ethernet shield working on the arduino mega 2560

" Sorry, we do not have any experience with an Arduino Mega at this time."

I’m not sure that this is the only problem but that wellwman have made ​​a product wellwman not even know well enough.
it’s not just the mega card problems occur but also on all other cards when using Wellman’s ethernet shield.
libraries do not match and if you are unexperienced you have to keep your fingers away from the shield, the chip on the card is not supported by Arduino.
So when welleman not bother to help in their own forum. one is left with it yourself.

I think that it is extremely low by welleman that there is no answer or response on their forum. Have now had an open thread in a long time without any response.

That being said I have also problems with getting the code to work.
I’m using another shield with a W5100 / W5200 chip and it works with all Arduino code examples.

kim jessen

Sorry, this shield was developed for Arduino Uno.
You’ve mentioned it was working fine on Arduino Uno.
I’m sure that you’ll understand that we cannot support use other than intended.

This is my solution for KA04 shield and Arduino mega:

1 delete “ethercard” library in arduino ide folder
2 download zip library at github.com/jcw/ethercard (in central/right of page)
3 unzip and rename folder in EtherCard, put it in Arduino IDE \ LIBRARIES folders
4 into sketch, insert pin 10 at all “ether.begin” command
(ether.begin(sizeof Ethernet::buffer, mymac, 10) == 0)

I decided that I’d use this KA04 board to minimize my development time for my project. However, I am using the Mega 2560 R3 Plus as well. I noted that Velleman states they do not support the Mega, all though in their example code they made an attempt to. So let me do thier job and boost their sales for their product. Here’s what you got to do.

All the problems are in enc38j60.cpp, so open that up.

You’ll find the following code. Note they have support for ATmega2560, hmmm, he said they don’t support it. Anyhow, lets move on. The definition for SPI_SS is incorrect, change it to 53 as pointed out below.

#if defined(AVR_ATmega1280) || defined(AVR_ATmega2560)

#define SPI_SS 2 // <— Change me to 53
#define SPI_MOSI 51
#define SPI_MISO 50
#define SPI_SCK 52

#else

// Default CS pin is 10, for the unmodified shield.
// Can be changed in init function to use another pin
// But SPI_SS needs to be setup correctly too

#define SPI_SS 10
#define SPI_MOSI 11
#define SPI_MISO 12
#define SPI_SCK 13

#endif

Also, the SELECT_BIT definition is incorrect for Mega 2560. They are bit setting it, and the for Uno it is 2 and for Mega it is 0. However, the Arduino definition for both is the same, which is 10. So if we use the digitalWrite command instead of the bitSet command, we can use 10. So redefine it as 10 instead of 2.

So find the SELECT_BIT definition and change it from 2 to 10 as indicated below.

#define SELECT_BIT 2 // <— Change me to 10

Next we need to re-write their enableChip and disableChip functions. Remove the cli() and sei() functions. They are enabling and disabling interrupts which is completely un-necessary. Next, remove the bitClear and bitSet functions. Add the the digitalWrite functions as shown.

static void enableChip () {
// cli(); // <— Remove me
// bitClear(PORTB, SELECT_BIT); // <— Remove me
digitalWrite(SELECT_BIT, LOW); // <— Add me
}

static void disableChip () {
// bitSet(PORTB, SELECT_BIT); // <— Remove me
// sei(); // <— Remove me
digitalWrite(SELECT_BIT, HIGH); // <— Add me
}

In the initSPI function add the two lines indicated below to setup the SELECT_BIT pin.

void ENC28J60::initSPI() {
// const byte SPI_SS = 10;
// const byte SPI_MOSI = 11;
// const byte SPI_MISO = 12;
// const byte SPI_SCK = 13;

pinMode(SELECT_BIT, OUTPUT); // <--- Add me
pinMode(SPI_SS, OUTPUT);
pinMode(SPI_MOSI, OUTPUT);
pinMode(SPI_SCK, OUTPUT);   
pinMode(SPI_MISO, INPUT);

digitalWrite(SELECT_BIT, HIGH); // <--- Add me
digitalWrite(SPI_SS, HIGH);
digitalWrite(SPI_MOSI, HIGH);
digitalWrite(SPI_MOSI, LOW);
digitalWrite(SPI_SCK, LOW);

SPCR = bit(SPE) | bit(MSTR); // 8 MHz @ 16

bitSet(SPCR, MSTR);
bitSet(SPCR, SPE);
bitSet(SPSR, SPI2X);

}

Also, in the initialize function remove the redundant lines shown below. They are now configured in the initSPI function, which is where they should be.

byte ENC28J60::initialize (word size, const byte* macaddr)
{
bufferSize = size;

if (bitRead(SPCR, SPE) == 0) initSPI();
  
// bitSet(DDRB, SELECT_BIT); // <--- Redundant, Remove
// pinMode(SPI_SS, OUTPUT); // <--- Redundant, Remove
disableChip();

writeOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);

while (!readOp(ENC28J60_READ_CTRL_REG, ESTAT) & ESTAT_CLKRDY);
    
gNextPacketPtr = RXSTART_INIT;

That should do it, give it a try, it works for me. You are welcome Velleman. :slight_smile:

So for you novice people, I decided to post my whole revised enc28j60.cpp file for you. Just copy and paste it. It’s will work with Uno or Mega 2560 as Velleman originally intended it too. They however made a few errors which I corrected.

// Microchip ENC28J60 Ethernet Interface Driver
// Author: Guido Socher, Revised by INTERFECTOREM69 to work for MEGA 2560 R3 Plus (7/11/2014)
// Copyright: GPL V2
// 
// Based on the enc28j60.c file from the AVRlib library by Pascal Stang.
// For AVRlib See http://www.procyonengineering.com/
// Used with explicit permission of Pascal Stang.
//
// 2010-05-20 <jc@wippler.nl>

#if ARDUINO>=100
#include <Arduino.h> // Arduino 1.0
#else
#include <Wprogram.h> // Arduino 0022
#endif
#include "enc28j60.h"

//Arduino Duemilanove and other ATmega168 / 328-based boards, 
//the SPI bus uses pins 10 (SS), 11 (MOSI), 12 (MISO), and 13 (SCK). 
//On the Arduino Mega, 
//this is 50 (MISO), 51 (MOSI), 52 (SCK), and 53 (SS). 
//Note that even if you're not using the SS pin, it must remain set as an output; 
//otherwise, the SPI interface can be put into slave mode, rendering the library inoperative.

// If this is a Mega then use alternative SPI pins
// In setup() function in your sketch also use the following:
// /* Disable SD card */
// pinMode(4, OUTPUT);
// digitalWrite(4, HIGH);
// 
// If you use a pin other than 53 then you still need to define
// pin 53 as output, in similar manner to ATMega328 versions:
// pinMode(53, OUTPUT);
// digitalWrite(53, HIGH);
// 
#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)

#define SPI_SS			53 // <--- Change me to 53
#define SPI_MOSI		51
#define SPI_MISO		50
#define SPI_SCK			52

#else

// Default CS pin is 10, for the unmodified shield.
// Can be changed in init function to use another pin
// But SPI_SS needs to be setup correctly too

#define SPI_SS			10
#define SPI_MOSI		11
#define SPI_MISO		12
#define SPI_SCK			13

#endif




uint16_t ENC28J60::bufferSize;

// ENC28J60 Control Registers
// Control register definitions are a combination of address,
// bank number, and Ethernet/MAC/PHY indicator bits.
// - Register address        (bits 0-4)
// - Bank number        (bits 5-6)
// - MAC/PHY indicator        (bit 7)
#define ADDR_MASK        0x1F
#define BANK_MASK        0x60
#define SPRD_MASK        0x80
// All-bank registers
#define EIE              0x1B
#define EIR              0x1C
#define ESTAT            0x1D
#define ECON2            0x1E
#define ECON1            0x1F
// Bank 0 registers
#define ERDPT           (0x00|0x00)
#define EWRPT           (0x02|0x00)
#define ETXST           (0x04|0x00)
#define ETXND           (0x06|0x00)
#define ERXST           (0x08|0x00)
#define ERXND           (0x0A|0x00)
#define ERXRDPT         (0x0C|0x00)
// #define ERXWRPT         (0x0E|0x00)
// #define EDMAST          (0x10|0x00)
// #define EDMAND          (0x12|0x00)
// #define EDMADST         (0x14|0x00)
// #define EDMACS          (0x16|0x00)
// Bank 1 registers
#define EHT0             (0x00|0x20)
#define EHT1             (0x01|0x20)
#define EHT2             (0x02|0x20)
#define EHT3             (0x03|0x20)
#define EHT4             (0x04|0x20)
#define EHT5             (0x05|0x20)
#define EHT6             (0x06|0x20)
#define EHT7             (0x07|0x20)
#define EPMM0            (0x08|0x20)
#define EPMM1            (0x09|0x20)
#define EPMM2            (0x0A|0x20)
#define EPMM3            (0x0B|0x20)
#define EPMM4            (0x0C|0x20)
#define EPMM5            (0x0D|0x20)
#define EPMM6            (0x0E|0x20)
#define EPMM7            (0x0F|0x20)
#define EPMCS           (0x10|0x20)
// #define EPMO            (0x14|0x20)
#define EWOLIE           (0x16|0x20)
#define EWOLIR           (0x17|0x20)
#define ERXFCON          (0x18|0x20)
#define EPKTCNT          (0x19|0x20)
// Bank 2 registers
#define MACON1           (0x00|0x40|0x80)
#define MACON2           (0x01|0x40|0x80)
#define MACON3           (0x02|0x40|0x80)
#define MACON4           (0x03|0x40|0x80)
#define MABBIPG          (0x04|0x40|0x80)
#define MAIPG           (0x06|0x40|0x80)
#define MACLCON1         (0x08|0x40|0x80)
#define MACLCON2         (0x09|0x40|0x80)
#define MAMXFL          (0x0A|0x40|0x80)
#define MAPHSUP          (0x0D|0x40|0x80)
#define MICON            (0x11|0x40|0x80)
#define MICMD            (0x12|0x40|0x80)
#define MIREGADR         (0x14|0x40|0x80)
#define MIWR            (0x16|0x40|0x80)
#define MIRD            (0x18|0x40|0x80)
// Bank 3 registers
#define MAADR1           (0x00|0x60|0x80)
#define MAADR0           (0x01|0x60|0x80)
#define MAADR3           (0x02|0x60|0x80)
#define MAADR2           (0x03|0x60|0x80)
#define MAADR5           (0x04|0x60|0x80)
#define MAADR4           (0x05|0x60|0x80)
#define EBSTSD           (0x06|0x60)
#define EBSTCON          (0x07|0x60)
// #define EBSTCS          (0x08|0x60)
#define MISTAT           (0x0A|0x60|0x80)
#define EREVID           (0x12|0x60)
#define ECOCON           (0x15|0x60)
#define EFLOCON          (0x17|0x60)
#define EPAUS           (0x18|0x60)

// ENC28J60 ERXFCON Register Bit Definitions
#define ERXFCON_UCEN     0x80
#define ERXFCON_ANDOR    0x40
#define ERXFCON_CRCEN    0x20
#define ERXFCON_PMEN     0x10
#define ERXFCON_MPEN     0x08
#define ERXFCON_HTEN     0x04
#define ERXFCON_MCEN     0x02
#define ERXFCON_BCEN     0x01
// ENC28J60 EIE Register Bit Definitions
#define EIE_INTIE        0x80
#define EIE_PKTIE        0x40
#define EIE_DMAIE        0x20
#define EIE_LINKIE       0x10
#define EIE_TXIE         0x08
#define EIE_WOLIE        0x04
#define EIE_TXERIE       0x02
#define EIE_RXERIE       0x01
// ENC28J60 EIR Register Bit Definitions
#define EIR_PKTIF        0x40
#define EIR_DMAIF        0x20
#define EIR_LINKIF       0x10
#define EIR_TXIF         0x08
#define EIR_WOLIF        0x04
#define EIR_TXERIF       0x02
#define EIR_RXERIF       0x01
// ENC28J60 ESTAT Register Bit Definitions
#define ESTAT_INT        0x80
#define ESTAT_LATECOL    0x10
#define ESTAT_RXBUSY     0x04
#define ESTAT_TXABRT     0x02
#define ESTAT_CLKRDY     0x01
// ENC28J60 ECON2 Register Bit Definitions
#define ECON2_AUTOINC    0x80
#define ECON2_PKTDEC     0x40
#define ECON2_PWRSV      0x20
#define ECON2_VRPS       0x08
// ENC28J60 ECON1 Register Bit Definitions
#define ECON1_TXRST      0x80
#define ECON1_RXRST      0x40
#define ECON1_DMAST      0x20
#define ECON1_CSUMEN     0x10
#define ECON1_TXRTS      0x08
#define ECON1_RXEN       0x04
#define ECON1_BSEL1      0x02
#define ECON1_BSEL0      0x01
// ENC28J60 MACON1 Register Bit Definitions
#define MACON1_LOOPBK    0x10
#define MACON1_TXPAUS    0x08
#define MACON1_RXPAUS    0x04
#define MACON1_PASSALL   0x02
#define MACON1_MARXEN    0x01
// ENC28J60 MACON2 Register Bit Definitions
#define MACON2_MARST     0x80
#define MACON2_RNDRST    0x40
#define MACON2_MARXRST   0x08
#define MACON2_RFUNRST   0x04
#define MACON2_MATXRST   0x02
#define MACON2_TFUNRST   0x01
// ENC28J60 MACON3 Register Bit Definitions
#define MACON3_PADCFG2   0x80
#define MACON3_PADCFG1   0x40
#define MACON3_PADCFG0   0x20
#define MACON3_TXCRCEN   0x10
#define MACON3_PHDRLEN   0x08
#define MACON3_HFRMLEN   0x04
#define MACON3_FRMLNEN   0x02
#define MACON3_FULDPX    0x01
// ENC28J60 MICMD Register Bit Definitions
#define MICMD_MIISCAN    0x02
#define MICMD_MIIRD      0x01
// ENC28J60 MISTAT Register Bit Definitions
#define MISTAT_NVALID    0x04
#define MISTAT_SCAN      0x02
#define MISTAT_BUSY      0x01

// PHY registers
#define PHCON1           0x00
#define PHSTAT1          0x01
#define PHHID1           0x02
#define PHHID2           0x03
#define PHCON2           0x10
#define PHSTAT2          0x11
#define PHIE             0x12
#define PHIR             0x13
#define PHLCON           0x14

// ENC28J60 PHY PHCON1 Register Bit Definitions
#define PHCON1_PRST      0x8000
#define PHCON1_PLOOPBK   0x4000
#define PHCON1_PPWRSV    0x0800
#define PHCON1_PDPXMD    0x0100
// ENC28J60 PHY PHSTAT1 Register Bit Definitions
#define PHSTAT1_PFDPX    0x1000
#define PHSTAT1_PHDPX    0x0800
#define PHSTAT1_LLSTAT   0x0004
#define PHSTAT1_JBSTAT   0x0002
// ENC28J60 PHY PHCON2 Register Bit Definitions
#define PHCON2_FRCLINK   0x4000
#define PHCON2_TXDIS     0x2000
#define PHCON2_JABBER    0x0400
#define PHCON2_HDLDIS    0x0100

// ENC28J60 Packet Control Byte Bit Definitions
#define PKTCTRL_PHUGEEN  0x08
#define PKTCTRL_PPADEN   0x04
#define PKTCTRL_PCRCEN   0x02
#define PKTCTRL_POVERRIDE 0x01

// SPI operation codes
#define ENC28J60_READ_CTRL_REG       0x00
#define ENC28J60_READ_BUF_MEM        0x3A
#define ENC28J60_WRITE_CTRL_REG      0x40
#define ENC28J60_WRITE_BUF_MEM       0x7A
#define ENC28J60_BIT_FIELD_SET       0x80
#define ENC28J60_BIT_FIELD_CLR       0xA0
#define ENC28J60_SOFT_RESET          0xFF

// The RXSTART_INIT must be zero. See Rev. B4 Silicon Errata point 5.
// Buffer boundaries applied to internal 8K ram
// the entire available packet buffer space is allocated

#define RXSTART_INIT        0x0000  // start of RX buffer, room for 2 packets
#define RXSTOP_INIT         0x0BFF  // end of RX buffer
                            
#define TXSTART_INIT        0x0C00  // start of TX buffer, room for 1 packet
#define TXSTOP_INIT         0x11FF  // end of TX buffer
                            
#define SCRATCH_START       0x1200  // start of scratch area
#define SCRATCH_LIMIT       0x2000  // past end of area, i.e. 3.5 Kb 
#define SCRATCH_PAGE_SHIFT  6       // addressing is in pages of 64 bytes
#define SCRATCH_PAGE_SIZE   (1 << SCRATCH_PAGE_SHIFT)

// max frame length which the conroller will accept:
// (note: maximum ethernet frame length would be 1518)
#define MAX_FRAMELEN      1500        

static byte Enc28j60Bank;
static int16_t gNextPacketPtr;

#define FULL_SPEED  1   // use full-speed SPI for bulk transfers
#define SELECT_BIT 10

void ENC28J60::initSPI() {
//    const byte SPI_SS   = 10;
//    const byte SPI_MOSI = 11;
//    const byte SPI_MISO = 12;
//    const byte SPI_SCK  = 13;
	
	pinMode(SELECT_BIT, OUTPUT); // <--- Add me
    pinMode(SPI_SS, OUTPUT);
    pinMode(SPI_MOSI, OUTPUT);
    pinMode(SPI_SCK, OUTPUT);   
    pinMode(SPI_MISO, INPUT);
    
	digitalWrite(SELECT_BIT, HIGH); // <--- Add me
	digitalWrite(SPI_SS, HIGH);
    digitalWrite(SPI_MOSI, HIGH);
    digitalWrite(SPI_MOSI, LOW);
    digitalWrite(SPI_SCK, LOW);

	SPCR = bit(SPE) | bit(MSTR); // 8 MHz @ 16
	
	bitSet(SPCR, MSTR);
	bitSet(SPCR, SPE);
    bitSet(SPSR, SPI2X);
}

static void enableChip () {
    // cli(); // <--- Remove me
	// bitClear(PORTB, SELECT_BIT); // <--- Remove me
	digitalWrite(SELECT_BIT, LOW); // <--- Add me
}

static void disableChip () {
    // bitSet(PORTB, SELECT_BIT); // <--- Remove me
    // sei();  // <--- Remove me
	digitalWrite(SELECT_BIT, HIGH); // <--- Add me
}

static void xferSPI (byte data)
{
    SPDR = data;
    while(!(SPSR & (1<<SPIF)));
}

static byte readOp (byte op, byte address) {
    enableChip();
    xferSPI(op | (address & ADDR_MASK));
    xferSPI(0x00);
    if (address & 0x80) xferSPI(0x00);
    byte result = SPDR;
    disableChip();
    return result;
}

static void writeOp (byte op, byte address, byte data) {
    enableChip();

    xferSPI(op | (address & ADDR_MASK));
	
	xferSPI(data);
    disableChip();
}

static void readBuf(word len, byte* data) {
    enableChip();
#if FULL_SPEED
    byte spiSave = SPCR;
    SPCR = bit(SPE) | bit(MSTR); // 8 MHz @ 16
#endif
    xferSPI(ENC28J60_READ_BUF_MEM);
    while (len--) {
        xferSPI(0x00);
        *data++ = SPDR;
    }
#if FULL_SPEED
    SPCR = spiSave;
#endif
    disableChip();
}

static void writeBuf(word len, const byte* data)
{
    enableChip();

#if FULL_SPEED
    byte spiSave = SPCR;
    SPCR = bit(SPE) | bit(MSTR); // 8 MHz @ 16
#endif

    xferSPI(ENC28J60_WRITE_BUF_MEM);
    while (len--) xferSPI(*data++);

#if FULL_SPEED
    SPCR = spiSave;
#endif

    disableChip();
}

static void SetBank (byte address)
{
    if ((address & BANK_MASK) != Enc28j60Bank)
	{
        writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_BSEL1|ECON1_BSEL0);
        Enc28j60Bank = address & BANK_MASK;
        writeOp(ENC28J60_BIT_FIELD_SET, ECON1, Enc28j60Bank>>5);
    }
}

static byte readRegByte (byte address)
{
    SetBank(address);

    return readOp(ENC28J60_READ_CTRL_REG, address);
}

static void writeRegByte (byte address, byte data)
{
    SetBank(address);
    writeOp(ENC28J60_WRITE_CTRL_REG, address, data);
}

static void writeReg(byte address, word data)
{
    writeRegByte(address, data);
    writeRegByte(address + 1, data >> 8);
}

static word readPhyByte (byte address)
{
    writeRegByte(MIREGADR, address);
    writeRegByte(MICMD, MICMD_MIIRD);

    while (readRegByte(MISTAT) & MISTAT_BUSY);

    writeRegByte(MICMD, 0x00);

    return readRegByte(MIRD+1);
}

static void writePhy (byte address, word data)
{
    writeRegByte(MIREGADR, address);
    writeReg(MIWR, data);
    while (readRegByte(MISTAT) & MISTAT_BUSY);
}

byte ENC28J60::initialize (word size, const byte* macaddr)
{
    bufferSize = size;

    if (bitRead(SPCR, SPE) == 0) initSPI();
      
    // bitSet(DDRB, SELECT_BIT); // <--- Redundant, Remove
	// pinMode(SPI_SS, OUTPUT); // <--- Redundant, Remove
    disableChip();
    
    writeOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);

    while (!readOp(ENC28J60_READ_CTRL_REG, ESTAT) & ESTAT_CLKRDY);
        
	gNextPacketPtr = RXSTART_INIT;
    writeReg(ERXST, RXSTART_INIT);
    writeReg(ERXRDPT, RXSTART_INIT);
    writeReg(ERXND, RXSTOP_INIT);
    writeReg(ETXST, TXSTART_INIT);
    writeReg(ETXND, TXSTOP_INIT);
    writeRegByte(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN);
    writeReg(EPMM0, 0x303f);
    writeReg(EPMCS, 0xf7f9);
    writeRegByte(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
    writeRegByte(MACON2, 0x00);
    writeOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);
    writeReg(MAIPG, 0x0C12);
    writeRegByte(MABBIPG, 0x12);
    writeReg(MAMXFL, MAX_FRAMELEN);  
    writeRegByte(MAADR5, macaddr[0]);
    writeRegByte(MAADR4, macaddr[1]);
    writeRegByte(MAADR3, macaddr[2]);
    writeRegByte(MAADR2, macaddr[3]);
    writeRegByte(MAADR1, macaddr[4]);
    writeRegByte(MAADR0, macaddr[5]);
    writePhy(PHCON2, PHCON2_HDLDIS);
    SetBank(ECON1);
    writeOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE);
    writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);

    return readRegByte(EREVID);
}

bool ENC28J60::isLinkUp()
{
    return (readPhyByte(PHSTAT2) >> 2) & 1;
}

void ENC28J60::packetSend(word len)
{
    while (readOp(ENC28J60_READ_CTRL_REG, ECON1) & ECON1_TXRTS)

    if (readRegByte(EIR) & EIR_TXERIF)
	{
		writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRST);
        writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRST);
    }

    writeReg(EWRPT, TXSTART_INIT);
    writeReg(ETXND, TXSTART_INIT+len);
    writeOp(ENC28J60_WRITE_BUF_MEM, 0, 0x00);
    writeBuf(len, buffer);
    writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS);
}

word ENC28J60::packetReceive()
{
    word len = 0;
    if (readRegByte(EPKTCNT) > 0)
	{
        writeReg(ERDPT, gNextPacketPtr);

        struct
		{
            word nextPacket;
            word byteCount;
            word status;
        } header;
        
        readBuf(sizeof header, (byte*) &header);

        gNextPacketPtr  = header.nextPacket;
        len = header.byteCount - 4; //remove the CRC count

        if (len>bufferSize-1) len=bufferSize-1;

        if ((header.status & 0x80)==0) len = 0;
        else readBuf(len, buffer);

        buffer[len] = 0;
        
		if (gNextPacketPtr - 1 > RXSTOP_INIT) writeReg(ERXRDPT, RXSTOP_INIT);
        else writeReg(ERXRDPT, gNextPacketPtr - 1);

        writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC);
    }

    return len;
}

void ENC28J60::copyout (byte page, const byte* data)
{
    word destPos = SCRATCH_START + (page << SCRATCH_PAGE_SHIFT);

    if (destPos < SCRATCH_START || destPos > SCRATCH_LIMIT - SCRATCH_PAGE_SIZE) return;

    writeReg(EWRPT, destPos);
    writeBuf(SCRATCH_PAGE_SIZE, data);
}

void ENC28J60::copyin (byte page, byte* data)
{
    word destPos = SCRATCH_START + (page << SCRATCH_PAGE_SHIFT);

    if (destPos < SCRATCH_START || destPos > SCRATCH_LIMIT - SCRATCH_PAGE_SIZE) return;

    writeReg(ERDPT, destPos);
    readBuf(SCRATCH_PAGE_SIZE, data);
}

byte ENC28J60::peekin (byte page, byte off) {
    byte result = 0;
    word destPos = SCRATCH_START + (page << SCRATCH_PAGE_SHIFT) + off;

    if (SCRATCH_START <= destPos && destPos < SCRATCH_LIMIT)
	{
        writeReg(ERDPT, destPos);
        readBuf(1, &result);
    }

    return result;
}